A camera capable of performing an automatic focusing includes an auto focus (AF) sensor for generating the necessary AF data. An example of such a AF sensor is illustrated in FIG. 1, and as shown may include a number of AF pixels (1, 2, 3, . . . ) disposed in a row or multiple rows, each of which pixels may generate AF data.
An example of a circuit diagram of an AF pixel of FIG. 1 is illustrated in FIG. 2. As shown in FIG. 2, an AF pixel may include a photo diode (PD) and transistors (Tr1, Tr2, and Tr3).
The PD receives a portion of light received through one or more lenses of the camera while the transistors (Tr1, Tr2, and Tr3) generate AF data using the output of the PD. Since there are 3 transistors, the AF pixel of FIG. 2 may be referred to as having a 3-Tr structure.
In the example pixel circuitry of FIG. 2, the transistor Tr1 discharges the electrical charge of the PD, and is often referred to as a reset transistor that resets the photodiode PD. The transistors Tr2 and Tr3 form a source follower, and transmits the output of the PD to a output terminal, which output representing the AF data.
As illustrated in the FIG. 2, the output of the PD is output to the output terminal via the source follower in the 3-Tr AF pixel, the gain of which source follower does not exceed ‘1’ Accordingly, the sensitivity of AF data output from the 3-Tr AF pixel may be low.
An example AF sensor of a conventional designed to address the above sensitivity issues is illustrated in FIG. 3. In addition to the AF pixels (1, 2, 3, . . . ), the AF sensor shown in FIG. 3 includes a monitoring pixel 20. The AF pixels (1, 2, 3, . . . ) in FIG. 3 are of the 4-Tr type, which are thus different from the 3-Tr type AF pixels of FIG. 1.
A circuit diagram for an example of a 4-Tr type AF pixel is illustrated in FIG. 4. As illustrated in FIG. 4, the AF pixel may comprises a photodiode PD and transistors (Tr1, Tr2, Tr3, and Tr4), that is, as the name suggests, the 4-Tr type AF pixel includes four transistors.
The transistor Tr1 discharges the electrical charge from the photodiode PD, and is thus the reset transistor that resets the PD. The transistors Tr2 and Tr3 form a source follower, which transmits an amplified output of the PD via the transistor Tr4 to the output terminal.
Because the PD output is transmitted via the transistor Tr4, the sensitivity of the AF data output from the 4-Tr type AF pixel may be higher. However, it may be difficult or even impossible to monitor the amount of received light by the PD in the 4-Tr type AF pixel in real time.
This is because it is difficult or even impossible to effectively monitor the light exposure time of the PD. If the light exposure time is not effectively controlled, the operational efficiency of the AF pixel may be thus adversely impacted, which may ultimately result, in a degradation of the AF performance.
In an attempt to address the above shortcoming, an AF sensor employing the 4-Tr type AF pixel may use the monitor pixel 20 to estimate the amount of received light in the AF pixel. In such AF sensor, the monitor pixel 20 is generally implemented as a 3-Tr type pixel as illustrated in FIG. 2.
However, as illustrated in FIG. 3, the location of the monitor pixel 20 is different from the locations of the AF pixels (1, 2, 3, . . . ) themselves, and the amount of light as monitored by the monitoring pixel 20 may in some situations be inaccurate.
For example, as illustrated in FIG. 5, although an image of a brighter area of a subject may be formed on the AF pixels (1, 2, 3, . . . ), an image of a darker area of the subject may be formed in the monitor pixel 20. In such a situation, the amount of received light in the AF pixels (1, 2, 3, . . . ) may be inaccurately estimated by the monitoring pixel 20.
Moreover, since the AF sensor monitors the amount of received light using the monitoring pixel 20, it may not be possible to monitor the amount of received light in one or more AF pixels on an individual basis, and it may thus not be possible to control the light exposure time of one or more AF pixels on an individual basis.